Animated Solution for Physics - Semiconductors: Four NOR gates are connected as shown in figure. The truth table for the given figure is

Solving complex logic circuits often feels like untangling a web of wires, but with a systematic approach, even the most intimidating diagrams reveal their elegant underlying structure. In this problem, we are presented with a circuit composed entirely of four NOR gates. Our mission is to determine the final truth table. While we could brute-force the solution by plugging in all four possible combinations of $0$s and $1$s, using Boolean algebra offers a much more satisfying and insightful path.

Labeling the Intermediates

The key to analyzing any multi-stage logic circuit is to break it down into bite-sized pieces. We start by labeling the intermediate outputs. Let's call the output of the central NOR gate $Y_1$, the top NOR gate $Y_2$, and the bottom NOR gate $Y_3$.

The central NOR gate is the easiest to tackle. It takes the primary inputs $A$ and $B$ directly. Since it's a NOR gate, its output is simply the negated OR of its inputs:

Next, we move to the top NOR gate. Its inputs are $A$ and our intermediate signal $Y_1$. Therefore, its output $Y_2$ is:

This expression looks a bit messy, but this is exactly where De Morgan's Laws come to the rescue. By breaking the long top bar and changing the OR sign to an AND sign, we get:

The double negation on the $(A+B)$ term cancels out, leaving us with:

Now, we distribute the $\overline{A}$ inside the parenthesis:

Here lies a beautiful property of Boolean algebra: a variable ANDed with its complement is always zero ($\overline{A}A=0$). Thus, the expression simplifies dramatically to:

By applying the exact same logic to the bottom NOR gate, which takes inputs $B$ and $Y_1$, we find its output $Y_3$:

Recognizing the Pattern

Finally, we reach the last NOR gate, which takes $Y_2$ and $Y_3$ as its inputs to produce the final output $Y$:

Take a close look at the expression under the main bar: $\overline{A}B+A\overline{B}$. This is the unmistakable signature of the XOR (Exclusive OR) operation, often written as $A\oplus B$.

Since our final output has a bar over the entire XOR expression, we are looking at the complement of XOR, which is the XNOR (Exclusive NOR) operation:

The XNOR gate is an "equality detector." It outputs a $1$ only when both inputs are identical (either both $0$ or both $1$), and outputs a $0$ when the inputs are different. Matching this behavior to the given options, we find that option (d) perfectly represents the truth table of an XNOR gate. What initially looked like a tangled mess of NOR gates was actually a classic, elegant design for an XNOR gate!